Cleanroom suits

Wafer

Caltech Micromachining Lab

Facilities

The Caltech Micromachining Laboratory was formally established after Dr. Yu-Chong Tai joined the EE faculty in 1989. Currently, the lab is located in the Moore Lab buidling. The MEMS Lab occupies over 6,200 sq. ft. including a Clean-Room Fabrication lab, a computer lab, MEMS measurement labs, and offices. Overall, the Caltech Micromachining Lab facilitates has a full line of silicon-micromachining capabilities and supports 2-4″ silicon wafers.

The 2,500 sq. ft. Clean-Room Fabrication lab is maintained under class-100 clean room conditions for lithography, metalization, oxidation and so on. Another 1,000 sq. ft. is class-1000 Clean Room for chemical and coating processing. In addition to the 3,500 square feet of clean-room processing area, 500 square feet of lab is for computer-aided design (CAD) and 2,000 square foot of space for electrical, mechanical and fluidic testing and office space.

Cleanroom DRIE EE 187 facilites 01 Cleanroom wafer  ws CLM Feb 2011 (27) (250x154)